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| TrilithICTM Target Data Overview Features * * * * Quad switch driver Free configurable as bridge or quad-switch Optimized for DC motor management applications Ultra low RDS ON @ 25 C: High-side switch: typ. 35 m, Low-side switch: typ. 15 m Very high peak current capability Very low quiescent current Space- and thermal optimized SMD-Power-Package Load and GND-short-circuit-protected Operates up to 40 V 2-Bit status flag diagnosis Overtemperature shut down with hysteresis Short-circuit detection and diagnosis Open-load detection and diagnosis C-MOS compatible inputs Internal clamp diodes Isolated sources for external current sensing Over- and under-voltage detection with hysteresis Ordering Code on request BTS 780 P-TO263-15-1 * * * * * * * * * * * * * Type BTS 780 Description Package P-TO263-15-1 The BTS 780 is a TrilithIC contains one double high-side switch and two low-side switches in one P-TO263-15-1. "Silicon instead of heatsink" becomes true The ultra low RDS ON of this device avoids powerdissipation. It saves costs in mechanical construction and mounting and increases the efficiency. The high-side switches are produced in the SIEMENS SMART SIPMOS(R) technology. It is fully protected and contains the signal conditioning circuitry for diagnosis (the comparable standard high-side product is the BTS 734L1). Semiconductor Group 1 1998-02-01 BTS 780 For minimized RDS ON the two low-side switches are produced in the SIEMENS S-Fet logic level technology (the comparable standard product is the BUZ 100SL). Each drain of these three chips is mounted on separated leadframes (see pin configuration). The sources of all four power transistors are connected to separate pins. So the BTS 780 can be used in H-Bridge configuration as well as in any other switch configuration. Moreover, it is possible to add current sense resistors. All these features open a broad range of automotive and industrial applications. Semiconductor Group 2 1998-02-01 BTS 780 Molding Compound SL1 SL1 GL1 GND GH1 ST1 SH1 1 2 3 4 5 6 7 16 GND GH2 ST2 SH2 SL2 SL2 GL2 8 9 10 11 12 13 14 AEP02224 Heat-Slug 1 17 DL1 Heat-Slug 2 DHVS Heat-Slug 3 15 DL2 Figure 1 Pin Configuration (top view) Semiconductor Group 3 1998-02-01 BTS 780 Pin Definitions and Functions Pin No. 1, 2 3 4, 8 5 6 7 9 10 11 12, 13 14 15 16 17 Symbol SL1 GL1 GND GH1 ST1 SH1 GH2 ST2 SH2 SL2 GL2 DL2 DHVS DL1 Function Source of low-side switch 1 Gate of low-side switch 1 Ground Gate of high-side switch 1 Status of high-side switch 1; open Drain output Source of high-side switch 1 Gate of high-side switch 2 Status of high-side switch 2; open Drain output Source of high-side switch 2 Source of low-side switch 2 Gate of low-side switch 2 Drain of low-side switch 2 Heat-Slug 3 or Heat-Dissipator Drain of high-side switches and power supply voltage Heat-Slug 2 or Heat-Dissipator Drain of low-side switch 1 Heat-Slug 1 or Heat-Dissipator Bold type: Pin needs power wiring Semiconductor Group 4 1998-02-01 BTS 780 DVHS 16 Heat-Slug 2 ST1 6 DST1 C6V1 Diagnosis ST2 10 DST2 C6V1 Biasing and Protection GH1 5 R I1 3.5 k GH2 9 R I2 3.5 k GND 4, 8 Driver IN OUT 1212 DI1 00LL C6V1 01LH 10HL 11HH DI2 C6V1 R O1 10 k R O2 10 k 11 SH2 Heat-Slug 3 15 7 Heat-Slug 1 17 DL2 SH1 DL1 GL1 3 GL2 14 1, 2 SL1 12, 13 SL2 AEB02225 Figure 2 Block Diagram Semiconductor Group 5 1998-02-01 BTS 780 Circuit Description Input Circuit The control inputs GH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into the necessary form for driving the power output stages. The inputs GH1 and GH2 are connected to a standard N-channel logic level power-MOS gate. Output Stages The output stages consist of an ultra low RDS ON Power-MOS H-Bridge. Protective circuits make the outputs short-circuit proof to ground and load short-circuit proof. Positive and negative voltage spikes, which occur when driving inductive loads, are limited by integrated power clamp diodes. Short-Circuit Protection (valid only for the high-side switches) The outputs are protected against - output short circuit to ground, and - overload (load short circuit). An internal OP-Amp controls the Drain-Source-Voltage of the HS-Switches by comparing the DS-Voltage-Drop with an internal reference voltage. Above this trippoint the OP-Amp reduces the output current depending on the junction temperature and the drop voltage. In the case of an overloaded high-side switch the corresponding status output is set to low. If the HS-Switches are in OFF-state-Condition internal resistors RO1,2 from SH1,2 to GND pull the voltage at SH1,2 to low values. On each output pin SH1 and SH2 an output examiner circuit compares the output voltages with the internal reference voltage VEO. This results in switching the corresponding status output to low if the source voltage in OFF-Condition is higher then VEO. In H-Bridge condition this feature can be used to protect the low-side switches against short circuit during the OFF-period. Overtemperature Protection (valid only for the high-side-switches) The chip also incorporates an overtemperature protection circuit with hysteresis which switches off the output transistors and sets the status output to low. Semiconductor Group 6 1998-02-01 BTS 780 Under-Voltage-Lockout (UVLO) When VS reaches the switch-on voltage VUV ON the IC becomes active with a hysteresis. The High-Side output transistors are switched off if the supply voltage VS drops below the switch off value VUV OFF. Over-Voltage-Lockout (OVLO) When VS reaches the switch-off voltage VOV OFF the High-Side output transistors are switched off with a hysteresis. The IC becomes active if the supply voltage VS drops below the switch-on value VOV ON. Open Load Detection Open load is detected by current measurement. If the output current drops below an internal fixed level the error flag is set with a delay. Status Flag Various errors as listed in the table "Diagnosis" are detected by switching the open drain outputs ST1 or ST2 to low. Semiconductor Group 7 1998-02-01 BTS 780 Truthtable and Diagnosis (valid only for the High-Side-Switches) Flag GH1 0 0 1 1 0 0 1 0 1 X 0 0 1 0 1 X GH2 0 1 0 1 0 1 X 0 0 1 0 1 X 0 0 1 X X 0 1 0 1 X X SH1 L L H H Z Z H L H X H H H L H X L L X X L L L L SH2 L H L H L H X Z Z H L H X H H H X X L L L L L L ST1 ST2 Remarks 1 1 1 1 1 1 0 1 1 1 0 1 1 1 1 1 1 0 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 1 1 1 0 1 1 1 1 1 0 1 0 0 1 stand-by mode switch1 active switch2 active both switches active Inputs Normal operation; identical with functional truth table Outputs Open load at high-side switch1 detected Open load at high-side switch2 detected detected Short circuit to DHVS at high-side switch1 Short circuit to DHVS at high-side switch2 detected Overtemperature high-side switch1 0 1 Overtemperature high-side switch2 X X Overtemperature both high-side switch Over- and Under-Voltage 0 X 1 X detected detected detected detected not detected Inputs: 0 = Logic LOW 1 = Logic HIGH X = don't care Outputs: Z = Output in tristate condition L = Output in sink condition H = Output in source condition X = Voltage level undefined Status: 1 = No error 0 = Error Semiconductor Group 8 1998-02-01 BTS 780 Electrical Characteristics Absolute Maximum Ratings - 40 C < Tj < 150 C Parameter Symbol Limit Values min. max. Unit Remarks High-Side-Switches (Pins DHVS, GH1,2 and SH1,2) Supply voltage HS-drain current HS-input current HS-input voltage Status Output ST Status Output current VS IDHS IGH VGH - 0.3 - 30 -2 - 10 43 * 2 16 V A mA V - * internally limited Pin GH1 and GH2 Pin GH1 and GH2 IST -5 5 mA Pin ST1 and ST2 Low-Side-Switches (Pins DL1,2, GL1,2 and SL1,2) Break-down voltage LS-drain current LS-drain current lS-input voltage Temperatures Junction temperature Storage temperature V(BR)DSS IDLS IDLS VGL 50 - - - 10 - 30 50 14 V A A V VGS = 0 V; ID 1 mA - t < 1 ms; < 0.1 Pin GL1 and GL2 Tj Tstg - 40 - 50 150 150 C C - - Thermal Resistances (one HS-LS-Path active) LS-junction case HS-junction case Junction ambient RthjCLS RthjCHS Rthja - - - tbd tbd 50 K/W measured to pin 15 or 17 K/W measured to pin 16 K/W - Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. Semiconductor Group 9 1998-02-01 BTS 780 Operating Range Parameter Supply voltage Input voltages Input voltages Status output current HS-junction temperature LS-junction temperature Symbol Limit Values min. max. V V V mA C C After VS rising above VUV ON - - Pin ST1 or ST2 - - Unit Remarks VS VGH VGL IST TjHS TjLS VUV OFF 34 - 0.3 -9 0 - 40 - 40 15 13 2 150 150 Note: In the operating range the functions given in the circuit description are fulfilled. Semiconductor Group 10 1998-02-01 BTS 780 Electrical Characteristics ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 150 C; 8 V > VS > 18 V unless otherwise specified Parameter Symbol Limit Values min. Current Consumption Quiescent current typ. max. Unit Test Condition IS - 15 40 A GH1 = GH2 = L VS = 13.2 V Tj = 25 C Quiescent current Supply current Supply current IS IS IS - - - - 2 4 50 4 8 A mA mA GH1 = GH2 = L VS = 13.2 V GH1 or GH2 = H GH1 and GH2 = H Under-Voltage-Lockout (UVLO) VUV ON VUV OFF Switch-OFF voltage Switch ON/OFF hysteresis VUV HY Switch-ON voltage Over-Voltage-Lockout (OVLO) - 3.5 - - - 0.2 7 - - V V V VS increasing VS decreasing VUV ON - VUV OFF VOV OFF VOV ON Switch-ON voltage Switch OFF/ON hysteresis VOV HY Switch-OFF voltage 34 33 - - - 0.5 43 - - V V V VS increasing VS decreasing VOV OFF - VOV ON Semiconductor Group 11 1998-02-01 BTS 780 Electrical Characteristics (cont'd) ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 150 C; 8 V > VS > 18 V unless otherwise specified Parameter Symbol Limit Values min. High-Side-Switches1, 2 Static drain-source on-resistance Static drain-source on-resistance Leakage current Clamp-diode forward-voltage Clamp-diode leakagecurrent (IFH + ISH) Short Circuit to GND Initial peak SC current Initial peak SC current Initial peak SC current Initial peak SC current Short Circuit to VS OFF-state examiner-voltage Output pull-down-resistor Open Circuit Detection current typ. max. Unit Test Condition RDS ON H RDS ON H IHSLK VFH ILKCL - - - - - 35 - - 0.8 - 40 75 30 1.5 10 m m A V mA ISH = 10 A Tj = 25 C ISH = 10 A VGH = VSH = 0 V IFH = 10 A IFH = 10 A ISCP ISCP ISCP ISCP 47 35 28 21 55 44 35 26 66 54 44 34 A A A A Tj = - 40 C Tj = 25 C Tj = 85 C Tj = 150 C VEO RO 2 4 3 10 4 30 V k VGH = 0 V - IOCD 0.01 - 1.2 A - Semiconductor Group 12 1998-02-01 BTS 780 Electrical Characteristics (cont'd) ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 150 C; 8 V > VS > 18 V unless otherwise specified Parameter Symbol Limit Values min. Switching Times Switch-ON-time; to 90% VSH Switch-OFF-time; to 10% VSH typ. max. Unit Test Condition tON - - 0.5 ms resistive load ISH = 10 A; VS = 12 V tOFF - - 0.5 ms resistive load ISH = 10 A; VS = 12 V Control Inputs GH 1, 2 H-input voltage threshold L-input voltage threshold Input voltage hysterese H-input current L-input current Input series resistance Zener limit voltage Low-Side-Switches 1, 2 Static drain-source on-resistance Static drain-source on-resistance Leakage current Clamp-diode forward-voltage VGHH VGHL VGHHY IGHH IGHL RI VGHZ - 1.5 - 20 1 2.5 5.4 - - 0.5 50 - 3.5 - 3.5 - - 90 50 6 - V V V A A k V - - - VGH = 5 V VGH = 0.4 V - IGH = 1.6 mA RDS ON L - 15 18 m RDS ON L ILKL VFL - - - - - 0.8 35 100 1.5 m A V ISL = 10 A; VGL = 5 V Tj = 25 C ISH = 10 A VGL = 0 V VDS = 18 V IFL = 10 A Semiconductor Group 13 1998-02-01 BTS 780 Electrical Characteristics (cont'd) ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 150 C; 8 V > VS > 18 V unless otherwise specified Parameter Symbol Limit Values min. Control Inputs GL1, 2 Gate-threshold-voltage Transconductance typ. max. Unit Test Condition VGL(th) gfs 0.6 - 1.6 5 2 - V S VGL = VDSL; IDL = 100 A VDSL = 20 V; IDL = 20 A Status Flag Output ST Low output voltage Leakage current Zener-limit-voltage Thermal Shutdown Thermal shutdown junction TjSD temperature Thermal switch-on junction TjSO temperature Temperature hysteresis T 150 140 - - - 10 190 180 - C C C - - T = TjSD - TjSO VSTL ISTLK VSTZ - - 5.4 0.2 - - 0.6 10 - V A V IST = 1.6 mA VST = 5 V IST = 1.6 mA Semiconductor Group 14 1998-02-01 BTS 780 S FH1, 2 ST1 , STLK1 ST1 6 DST1 C6V1 DHVS 16 Heat-Slug 2 CS 470 nF CL 1000 F +VS ST2 , STLK2 ST2 10 DST2 C6V1 Diagnosis Biasing and Protection VDSH2 VDSH1 _V _V FH2 FH1 Driver IN OUT 1212 DI1 C6V1 0 0 L L 01LH 10HL 11HH DI2 C6V1 VST1 VSTL1 VSTZ1 V ST2 VSTL2 VSTZ2 VGH1 GH1 GH1 5 R I1 3.5 k R O1 10 k R O2 10 k GH2 VGH2 11 SH2 SH2 GH2 9 R I2 3.5 k GND 4, 8 Heat-Slug 3 15 DL2 DL2 LKL 7 SH1 SH1 17 DL1 DL1 LKL VUVON VUVOFF VOVON VOVOFF GND LKCL1, 2 Heat-Slug 1 GL1 3 VGL1 VGL(th)1 GL2 14 VGL2 VGL(th)2 1, 2 SL1 SL1 12, 13 SL2 SL2 VEO1 VEO2 VDSL1 VDSL2 _V _V FL1 FL2 R DSONH = VDSH SH R DSONL = VDSL SL AES02226 Figure 3 Test Circuit Named during Open Circuit Named during Leakage-Cond. HS-Source-Current Named during Short Circuit ISH1,2 ISCP IOCD IHSLK Semiconductor Group 15 1998-02-01 BTS 780 Watchdog Reset Q TLE 4278G D I R ST22 100 k WD R VCC R ST12 100 k ST1 6 CQ 22 F C D GND 100 nF C S1 470 nF DHVS 16 Heat-Slug 2 VS = 12 V C S2 470 F R ST11 10 k DST1 C6V1 ST2 10 DST2 C6V1 GH1 5 Diagnosis Biasing and Protection R ST21 10 k R I1 3.5 k P GH2 9 R I2 3.5 k GND 4, 8 Driver IN OUT DI1 1 2 1 2 C6V1 0 0 L L 01LH 10HL 11HH DI2 C6V1 R O1 10 k R O2 11 SH2 10 k Heat-Slug 3 15 DL2 7 SH1 17 DL1 M1 Heat-Slug 1 GL1 3 GL2 14 1, 2 SL1 12, 13 SL2 AES02227 Figure 4 Application Circuit Semiconductor Group 16 1998-02-01 BTS 780 Package Outlines P-TO263-15-1 (Plastic Transistor Single Outline Package) 21.6 0.2 10.2 5.56 0.15 8.18 0.15 10.3 8.3 1) 1.27 0.1 B 0.1 8.21) 8.41) 4.4 4.8 1) A 0.05 (15) 9.25 0.2 2.4 2.7 0.3 0...0.15 14x1.4 0.8 0.1 8 max. 4.7 0.5 0.5 0.1 0.25 1) M AB 0.1 Typical All metal surfaces tin plated, except area of cut. GPT09151 Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device Semiconductor Group 17 Dimensions in mm 1998-02-01 |
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